发明名称 PASSIVATION SCHEME
摘要 An integrated circuit includes a substrate and passivation layers. The passivation layers include a bottom dielectric layer formed over the substrate for passivation, a doped dielectric layer formed over the bottom dielectric layer for passivation, and a top dielectric layer formed over the doped dielectric layer for passivation.
申请公布号 US2014001607(A1) 申请公布日期 2014.01.02
申请号 US201213539160 申请日期 2012.06.29
申请人 CHUANG CHENG-CHI;HUANG KUN-MING;HUNG HSUAN-HUI;LIN MING-YI;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 CHUANG CHENG-CHI;HUANG KUN-MING;HUNG HSUAN-HUI;LIN MING-YI
分类号 H01L29/02;H01L21/02;H01L21/28 主分类号 H01L29/02
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