发明名称 CAMERA SYSTEM DUAL-ENCODER ARCHITECTURE
摘要 An image capture accelerator performs accelerated processing of image data. In one embodiment, the image capture accelerator includes accelerator circuitry including a pre-processing engine and a compression engine. The pre-processing engine is configured to perform accelerated processing on received image data, and the compression engine is configured to compress processed image data received from the pre-processing engine. In one embodiment, the image capture accelerator further includes a demultiplexer configured to receive image data captured by an image sensor array implemented within, for example, an image sensor chip. The demultiplexer may output the received image data to an image signal processor when the image data is captured by the image sensor array in a standard capture mode, and may output the received image data to the accelerator circuitry when the image data is captured by the image sensor array in an accelerated capture mode.
申请公布号 US2016173777(A1) 申请公布日期 2016.06.16
申请号 US201615049014 申请日期 2016.02.20
申请人 GoPro, Inc. 发明人 Campbell Scott Patrick;Mobbs Paul;Adsumilli Balineedu Chowdary;Chawla Sumit
分类号 H04N5/232;H04N19/172;H04N19/63 主分类号 H04N5/232
代理机构 代理人
主权项 1. A camera system, comprising: an image sensor chip configured to produce image data representative of light incident upon the image sensor chip; an image signal processor chip (“ISP”) configured to process the image data; and an image capture accelerator chip (“ICA”) coupled between the image sensor chip and the ISP, the image capture accelerator comprising: an input configured to receive the image data from the image sensor chip;an H.264 encoder configured to encode the received image data to produce a set of frames, the set of frames comprising a set of i-frames, a set of b-frames, and a set of p-frames,a wavelet encoder configured to encode the set of i-frames to produce a set of encoded i-frames;a concatenator configured to concatenate the set of encoded i-frames, the set of b-frames, and the set of p-frames to produce concatenated encoded image data; andan output configured to output the received image data when the ICA is configured to operate in a normal mode and to output the concatenated encoded image data when the ICA is configured to operate in an accelerated mode.
地址 San Mateo CA US