| 摘要 |
An SR-2/8 FFT apparatus includes a memory, an SRFFT processor and a control unit. The control unit includes an input control block, an SRFFT control block and an output control block. The input control block loads memory banks with the input data in a first order, such that the SRFFT processor is able to retrieve data from the memory banks simultaneously in a single clock cycle. The SRFFT control block determines a decomposition structure of a 2M-point FFT and controls the SRFFT processor to repeatedly perform a butterfly computation along the decomposition structure. The order of the input data of each butterfly computation fits in with the first order. The SRFFT control block controls output results of each butterfly computation to be written back into the memory banks corresponding to the input data. The output control block controls the output results to be outputted in a second order. |
