Verification Method from Electronic System Level to Gate Level Using Systematic Progressive Refinement,申请号KR20060092574-传众专利搜索

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发明名称	Verification Method from Electronic System Level to Gate Level Using Systematic Progressive Refinement
摘要
申请公布号	KR101328263(B1)	申请公布日期	2013.11.14
申请号	KR20060092574	申请日期	2006.09.22
申请人		发明人
分类号	G06F9/00;G06F9/455	主分类号	G06F9/00
代理机构		代理人
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地址

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