发明名称 |
Method of fabricating gate electrode using a treated hard mask |
摘要 |
A method for fabricating an integrated device is disclosed. In an embodiment, a hard mask layer with a limited thickness is formed over a gate electrode layer. A treatment is provided to the hard mask layer to make the hard mask layer more resistant to a wet etch solution. Then, a patterning is provided on the treated hard mask layer and the gate electrode to from a gate structure.
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申请公布号 |
US8569185(B2) |
申请公布日期 |
2013.10.29 |
申请号 |
US20100700862 |
申请日期 |
2010.02.05 |
申请人 |
YEH MATT;OUYANG HUI;CHUNG HAN-PIN;WANG SHIANG-BAU;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
YEH MATT;OUYANG HUI;CHUNG HAN-PIN;WANG SHIANG-BAU |
分类号 |
H01L21/31;H01L21/027;H01L21/3205;H01L21/425;H01L21/44;H01L21/469;H01L21/4763;H01L21/8238 |
主分类号 |
H01L21/31 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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