发明名称 |
Blocking layers for leakage current reduction in DRAM devices |
摘要 |
A method for forming a DRAM MIM capacitor stack having low leakage current involves the use of a first electrode that serves as a template for promoting the high k phase of a subsequently deposited dielectric layer. The high k dielectric layer comprises a doped material that can be crystallized after a subsequent annealing treatment. An amorphous blocking is formed on the dielectric layer. The thickness of the blocking layer is chosen such that the blocking layer remains amorphous after a subsequent annealing treatment. A second electrode layer compatible with the blocking layer is formed on the blocking layer.
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申请公布号 |
US8569818(B2) |
申请公布日期 |
2013.10.29 |
申请号 |
US201213658065 |
申请日期 |
2012.10.23 |
申请人 |
INTERMOLECULAR, INC. |
发明人 |
MALHOTRA SANDRA G.;CHEN HANHONG;DEWEERD WIM Y.;ODE HIROYUKI |
分类号 |
H01L29/94;H01L21/20 |
主分类号 |
H01L29/94 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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