发明名称 MEMORY ERROR CORRECTION
摘要 In a method, by a first circuit, a plurality of bits is converted in a first format to a second format. By a second circuit, the plurality of bits in the second format is used to program a plurality of memory cells corresponding to the plurality of bits. The first circuit and the second circuit are electrically coupled together in a first chip. The plurality of bits is selected from the group consisting of 1) address information, cell data information, and program information of a memory cell that has an error; and 2) word data information of a first word and error code and correction information corresponding to the word data information of the first word.
申请公布号 US2013262962(A1) 申请公布日期 2013.10.03
申请号 US201213434588 申请日期 2012.03.29
申请人 CHEN YUN-HAN;LIN SUNG-CHIEH;HSU KUOYUAN (PETER);TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 CHEN YUN-HAN;LIN SUNG-CHIEH;HSU KUOYUAN (PETER)
分类号 G06F11/07;G06F11/10;H03M13/19 主分类号 G06F11/07
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