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发明名称
A method of and an arrangement for testing connections on a printed circuit board
摘要
申请公布号
EP2320241(B1)
申请公布日期
2013.01.09
申请号
EP20100190550
申请日期
2010.11.09
申请人
JTAG TECHNOLOGIES B.V.
发明人
VAN DEN EIJNDEN, PETRUS MARINUS CORNELIS MARIA
分类号
G01R31/3185
主分类号
G01R31/3185
代理机构
代理人
主权项
地址
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