发明名称 METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT OF CHECKING AN INTEGRATED CIRCUIT LAYOUT FOR INSTANCES OF A REFERENCE PATTERN
摘要 <p>A method 100, a computer program product and a system of checking an integrated circuit layout for instances of a reference pattern is provided The method 100 comprises the steps of: i) receiving 102 the integrated circuit layout, ii) receiving 104 a drawing of the reference pattern from a user, iii) deducting 106 a basic pattern definition from the drawn reference pattern, iv) determining 108 a set of topological relation based on the drawn reference pattern, v) forming 110 a complex pattern description which is a combination of the deducted basic pattern definition and the set of topological relations, vi) checking 112 the integrated circuit layout for patterns that match the complex pattern description to find instances of the reference pattern in the integrated circuit layout, and vii) storing 114 found instances of the reference pattern.</p>
申请公布号 WO2012156395(A1) 申请公布日期 2012.11.22
申请号 WO2012EP58999 申请日期 2012.05.15
申请人 SAGANTEC ISRAEL LTD.;VAN GISBERGEN, JOZEFUS GODEFRIDUS GERARDUS PANCRATIUS;BLAKELY, DANIEL JAMES;OOMENS, ROB;ZELNIK, JACOB 发明人 VAN GISBERGEN, JOZEFUS GODEFRIDUS GERARDUS PANCRATIUS;BLAKELY, DANIEL JAMES;OOMENS, ROB;ZELNIK, JACOB
分类号 G06F17/50 主分类号 G06F17/50
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