| 摘要 |
A PLL circuit comprises a phase detector, a charge pump, a loop filter, a voltage-controlled oscillator (VCO), and two variable voltage sources. The phase detector and the charge pump each comprises low-voltage transistors, and operates with a fixed supply voltage VCC1 (e.g., 5 V) which is a potential difference applied from the variable voltage source of a power-supply voltage VL and the variable voltage source of a power-supply voltage VDC (=VL+VCC1). A tuning control signal VC generated by integrating an output current signal of the charge pump using the loop filter is input to the VCO having an input voltage range of the tuning control signal from 0 V to VCC2 (e.g., 16 V). At this time, the output voltage range of the tuning control signal is from VL to VDC, but the output voltage range is expanded to cover the full input voltage range from 0 V to VCC2 by controlling the output voltages VL, VDC of the variable voltage sources, thereby allowing the VCO to output an output signal with a desired oscillation frequency. |
