发明名称 Semiconductor circuit apparatus and delay difference calculation method
摘要 A semiconductor circuit apparatus having a clock oscillating circuit includes a first inverter circuit having a power supply terminal connected to a power supply potential via a first power supply potential connection transistor and a ground terminal connected to a ground potential via a first ground potential connection transistor, an inverter circuit block having a second inverter circuit connected to the power supply potential via a second power supply potential connection transistor and to the ground potential via a second ground potential connection transistor and connected to the first inverter circuit in parallel and a selection circuit block that outputs a power supply potential connection signal to any one of gate terminals of the first and second power supply potential connection transistors and a ground potential connection signal to any one of gate terminals of the first and second ground potential connection transistors.
申请公布号 US8305149(B2) 申请公布日期 2012.11.06
申请号 US20090562563 申请日期 2009.09.18
申请人 SUGIYAMA ITSUMI;FUJITSU LIMITED 发明人 SUGIYAMA ITSUMI
分类号 H03K3/03;G01R31/27 主分类号 H03K3/03
代理机构 代理人
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