发明名称 REASSEMBLING SCATTERED LOGIC BLOCKS IN INTEGRATED CIRCUITS
摘要 Techniques for reassembling scattered logic blocks in an integrated circuit (IC) are provided. The techniques include identifying a virtual memory block to be reassembled in an IC design. The virtual memory block is formed by a plurality of memory blocks that are connected by a plurality of logic circuitry. The plurality of memory blocks and the plurality logic circuitry that connect the memory blocks within the virtual memory block are identified. The identified logic circuitry and memory blocks are removed from the virtual memory block. The virtual memory block is replaced with a custom memory block that is functionally comparable to the plurality of connected memory blocks in the virtual memory block.
申请公布号 US2012216165(A1) 申请公布日期 2012.08.23
申请号 US201113031801 申请日期 2011.02.22
申请人 RAZHA MOHD MOWARDI BIN MOHD;YUAN JINYONG 发明人 RAZHA MOHD MOWARDI BIN MOHD;YUAN JINYONG
分类号 G06F17/50 主分类号 G06F17/50
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