发明名称 TEST CIRCUIT
摘要 PURPOSE: A test circuit is provided to reduce test time by respectively terminating a test signal according to each group. CONSTITUTION: A high rank test signal generating unit(1) is composed of a first high rank test signal generating unit and a second high rank test signal generating unit. The first high rank test signal generating unit creates a first high rank test signal in reply to a first high rank enable signal and a high rank termination signal. The second high rank test signal generating unit creates a second high rank test signal in reply to a second high rank enable signal and the high rank termination signal. The high rank test signal generating unit tests a high rank group. A low rank test signal generating unit(2) is composed of a first low rank test signal generating unit and a second low rank test signal generating unit. The first low rank test signal generating unit creates a first low rank test signal in reply to a first low rank enable signal and a low rank termination signal. The second low rank test signal generating unit creates a second low rank test signal in reply to a second low rank enable signal and the low rank termination signal. The low rank test signal generating unit tests a low rank group.
申请公布号 KR20120075984(A) 申请公布日期 2012.07.09
申请号 KR20100137934 申请日期 2010.12.29
申请人 SK HYNIX INC. 发明人 HWANG, MI HYUN
分类号 G01R31/3183 主分类号 G01R31/3183
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