| 摘要 |
<P>PROBLEM TO BE SOLVED: To dynamically operate memory access type data including tiled or untiled memory access. <P>SOLUTION: An address pre-swizzle circuit 330 adjusts address bits provided by a processor according to an access control signal. A data steering circuit 310 connects with N sub-channels of a memory, and dynamically operates memory access type data including the tiled or untiled memory access according to the access control signal, the address bits having been adjusted, and sub-channel identifiers associated with N sub-channels. The tiled memory access includes horizontal and vertical tiled memory access. Address post-swizzle circuits 335<SB POS="POST">0</SB>- 335<SB POS="POST">3</SB>use the address bits having been adjusted to generate sub-channel address bits for the N sub-channels according to the access control signal and sub-channel identifiers. <P>COPYRIGHT: (C)2012,JPO&INPIT |
