发明名称 Enabling speculative state information in a cache coherency protocol
摘要 In one embodiment, the present invention includes a method for receiving a bus message in a first cache corresponding to a speculative access to a portion of a second cache by a second thread, and dynamically determining in the first cache if an inter-thread dependency exists between the second thread and a first thread associated with the first cache with respect to the portion. Other embodiments are described and claimed.
申请公布号 US8185700(B2) 申请公布日期 2012.05.22
申请号 US20060226793 申请日期 2006.05.30
申请人 GIMENO CARLOS MADRILES;QUINONES CARLOS GARCIA;MARCUELLO PEDRO;SANCHEZ JESUS;LATORRE FERNANDO;GONZALEZ ANTONIO;INTEL CORPORATION 发明人 GIMENO CARLOS MADRILES;QUINONES CARLOS GARCIA;MARCUELLO PEDRO;SANCHEZ JESUS;LATORRE FERNANDO;GONZALEZ ANTONIO
分类号 G06F12/00 主分类号 G06F12/00
代理机构 代理人
主权项
地址