发明名称 Multiple Page Size Segment Encoding
摘要 An approach identifies an amount of high order bits used to store a memory address in a memory address field that is included in a memory. This approach calculates at least one minimum number of low order bits not used to store the address with the calculation being based on the identified amount of high order bits. The approach retrieves a data element from one of the identified minimum number of low order bits of the address field and also retrieves a second data element from one of the one of the identified minimum number of low order bits of the address field.
申请公布号 US2011283040(A1) 申请公布日期 2011.11.17
申请号 US20100779563 申请日期 2010.05.13
申请人 CHADHA SUNDEEP;MAY CATHY;NAYAR NARESH;SWANBERG RANDAL CRAIG;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CHADHA SUNDEEP;MAY CATHY;NAYAR NARESH;SWANBERG RANDAL CRAIG
分类号 G06F12/10;G06F12/00 主分类号 G06F12/10
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