发明名称 Reconfigurable receiver architectures
摘要 <p>Described herein is a adaptive front-end receiver architecture (200) that is configurable to operate in a first mode where an incoming signal is amplified before being down-converted and in a second mode where the incoming signal is down-converted without amplification. The architecture (200) comprises a low-noise amplifier (210) having an input (215) to which an input signal (220) is applied for processing and a mixer arrangement (250) connected in series with the low-noise amplifier (210), the mixer arrangement (250) including a local oscillator (LO2) that down-converts output signals from the low-noise amplifier (210). A further mixer arrangement (240), including a further local oscillator (LO1), is provided that bypasses the low-noise amplifier (210), the further local oscillator (LO1) directly down-converting the input signal (220). In each mode of operation, the down-converted signal is filtered using a baseband impedance component (230) to provide an output signal (260) for further processing.</p>
申请公布号 EP2387159(A1) 申请公布日期 2011.11.16
申请号 EP20110165730 申请日期 2011.05.11
申请人 IMEC;RENESAS ELECTRONICS CORPORATION 发明人 BORREMANS, JONATHAN
分类号 H04B1/18 主分类号 H04B1/18
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