发明名称 |
Enhanced dynamic address translation with load real address function |
摘要 |
What is provided is a load real address function defined for a machine architecture of a computer system. In one embodiment, a machine instruction containing an opcode is obtained indicating that a load real address is to be performed. The instruction further identifies a first general register. Based on the contents of the machine instruction, a virtual address to be translated is obtained. Dynamic address translation is performed on the virtual address to obtain a segment-frame absolute address of a large block of data in memory. If an extended DAT facility and a format control field in the segment table entry are enabled, the address of the block of data is saved in the first general register. A page index portion and a byte index portion of the virtual address may also be saved in the first general register.
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申请公布号 |
US8041922(B2) |
申请公布日期 |
2011.10.18 |
申请号 |
US20080972705 |
申请日期 |
2008.01.11 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
GREINER DAN F.;HELLER LISA C.;OSISEK DAMIAN L.;PFEFFER ERWIN;SLEGEL TIMOTHY J.;SITTMANN GUSTAV E. |
分类号 |
G06F12/02 |
主分类号 |
G06F12/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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