发明名称 Pseudo hybrid structure for low K interconnect integration
摘要 A method and apparatus are described for fabricating an ultra low-k interconnect structure by depositing and curing a first via layer (43) of ultra low dielectric constant (ULK) material, depositing a second uncured trench layer (51) of the same ULK material, selectively etching a via opening (62) and trench opening (72) with a dual damascene etch process which uses a trench etch end point signal from the chemical differences between uncured trench layer (51) and the underlying cured via layer (43), and then curing the second trench layer (83) before forming an interconnect structure (91) by filling the trench opening (72) and via opening (62) with an interconnection material so that there is no additional interface or higher dielectric constant material left behind.
申请公布号 US7955968(B2) 申请公布日期 2011.06.07
申请号 US20090399372 申请日期 2009.03.06
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 LEUNG PAK K.;SPARKS TERRY G.;HORAK DAVID V.;GATES STEPHEN M.
分类号 H01L21/4763 主分类号 H01L21/4763
代理机构 代理人
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