发明名称 PLL CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a PLL circuit capable of automatically correcting aging characteristics and reducing output frequency fluctuation when an external reference signal is not connected or unlocked. <P>SOLUTION: In the PLL circuit, when a reference signal is in a locked state within an appropriate range, upon initial adjustment, the initial voltage of a charge pump output voltage (A) is read together with temperature information T, the setting value of a DA converter or a PWM output circuit 9 is adjusted so that a voltage (B) for setting a free-running frequency becomes the voltage (A), and a temperature characteristic initial table is generated. During an operation, a setting value corresponding to the latest voltage of the voltage (A) in the temperature information T is specified by referring to the temperature characteristic initial table, the table is offset-corrected by the difference of the setting values of the initial voltage and the latest voltage to generate a temperature correction table for free running, and free running is performed by the voltage (B) for setting the free-running frequency by the specified setting value when an unlocked state or the like occurs. <P>COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011040967(A) 申请公布日期 2011.02.24
申请号 JP20090186066 申请日期 2009.08.10
申请人 NIPPON DEMPA KOGYO CO LTD 发明人 SHIOBARA TAKESHI;ONISHI NAOKI;KIMURA HIROKI
分类号 H03L7/10;H03L1/02;H03L7/095;H03L7/14 主分类号 H03L7/10
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