| 摘要 |
PURPOSE:To constitute a titled microcomputer so that a debugging operation is not halted even if a reset signal is inputted in the course of the debugging operation, by providing plural reset signal input terminals for inputting plural reset signals for initializing an internal state, respectively. CONSTITUTION:In case when an evaluating microcomputer 1' is executing a debugging operation, a set-reset type flip-flop 16 is set by a reset signal applied to a user reset signal input terminal 14, and its output Q becomes a high level, but since a debug discriminating signal 18 is in a low level, an output of an AND circuit 17 becomes a low level. Accordingly, since an output of an OR circuit 15 is in a low level, the evaluating microcomputer is not initialized, and the debugging operation is executed. Thereafter, when the debugging operation is ended and the debug discriminating signal 18 becomes a high level, the output of the OR circuit 15 becomes a high level, and the evaluating microcomputer is initialized. |
