| 摘要 |
PROBLEM TO BE SOLVED: To solve problems, such as erroneous write operation and data destruction, which are caused due to variations in CMOS transistors when an phase change element is operated at a core voltage (e.g., 1.2 V) using a minimum-size CMOS transistor.SOLUTION: The semiconductor device includes a plurality of memory cells, a central processing unit, a timer circuit which measures RESET time, and a timer circuit which measures SET time. A threshold voltage of an NMOS transistor used in each memory cell is set to be lower than that of a peripheral circuit, thereby easily executing a RESET operation. Moreover, a current is caused to flow in different directions during RESET and SET, and bit lines are driven at a high speed, thereby preventing an erroneous operation. |
