发明名称
摘要 In a semiconductor integrated circuit device in which a rectifier device constituting a rectifier comprises a MOS transistor whose gate is connected to one antenna terminal and whose source is connected to the other antenna terminal, the parasitic capacitance applied between the antenna terminals increased. The present invention provides a technology for connecting a first MOS transistor whose gate is connected to a second input terminal between a first input terminal and a first output terminal, allowing an output terminal of a first bulk terminal control circuit, which is connected between the first and second input terminals, to control a bulk terminal of the first MOS transistor, and allowing an output terminal of a second bulk terminal control circuit, which is connected between the first and second input terminals, to control a bulk terminal of a second MOS transistor, which is connected between the second input terminal and the first output terminal.
申请公布号 JP4521598(B2) 申请公布日期 2010.08.11
申请号 JP20040298548 申请日期 2004.10.13
申请人 发明人
分类号 H02M7/12;G06K19/07;G11C11/413;H01L21/822;H01L27/04;H02M7/219 主分类号 H02M7/12
代理机构 代理人
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