发明名称 HIGH-LEVEL SYNTHESIS APPARATUS
摘要 <P>PROBLEM TO BE SOLVED: To automatically execute latency adjustment between modules when the latency of a certain module is changed when constituting a plurality of modules. Ž<P>SOLUTION: A high-level synthesis apparatus 1 performs high-level synthesis processing by inputting behavioral description to output HDL description. The high-level synthesis apparatus is provided with: a latency adjustment path specification part 201 which specifies a latency adjustment part in the behavioral description; a latency adjustment path extraction part 202 which extracts a connection relation between an input and an output from the specified latency adjustment part to input and the modules; a behavioral synthesis part 203 which executes the behavior synthesis of the extracted modules; a latency information extraction part 204 which extracts latency information about each module according to results of the behavior synthesis part 203; a latency calculation part 205 which calculates a latency value inserted into the specified latency adjustment part on the basis of the extracted latency information; and a latency insertion part 206 which inserts the calculated latency value into the HDL description. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2010165334(A) 申请公布日期 2010.07.29
申请号 JP20090141173 申请日期 2009.06.12
申请人 RICOH CO LTD 发明人 KOMORI TAKUMI
分类号 G06F17/50 主分类号 G06F17/50
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