发明名称 DEPLETION-TYPE NAND FLASH MEMORY
摘要 A depletion-type NAND flash memory includes a NAND string composed of a plurality of serially connected FETs, a control circuit which controls gate potentials of the plurality of FETs in a read operation, a particular potential storage, and an adjacent memory cell threshold storage, wherein each of the plurality of FETs is a transistor whose threshold changes in accordance with a charge quantity in a charge accumulation layer, the adjacent memory cell threshold storage stores a threshold of a source line side FET adjacent to a source line side of a selected FET, and the control circuit applies a potential to the gate electrode of the source line side FET in the read operation, the applied potential being obtained by adding a particular potential stored in the particular potential storage to a threshold stored in the adjacent memory cell threshold storage.
申请公布号 US2010133627(A1) 申请公布日期 2010.06.03
申请号 US20090603099 申请日期 2009.10.21
申请人 MIZUKAMI MAKOTO;NISHIHARA KIYOHITO 发明人 MIZUKAMI MAKOTO;NISHIHARA KIYOHITO
分类号 H01L27/088 主分类号 H01L27/088
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