发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD
摘要 <P>PROBLEM TO BE SOLVED: To provide a semiconductor device wherein lock-out of a spacer film at the lower part of a via hole is avoided and further a margin distance to an adjacent wiring layer is secured at the upper part of a via plug. Ž<P>SOLUTION: This device includes: a first interlayer insulating film 30 which is provided on a silicon substrate 1 and includes a contact plug 32 penetrating from the upper surface and the lower surface; a second interlayer insulating film 40 which is formed on the first interlayer insulating film 30 and includes a via hole 41 penetrating from the upper surface to the lower surface at the position corresponding to the forming position of the contact plug 32; and a via plug 43 wherein a conducting material is so embedded in the via hole 41 as to electrically contact the contact plug 32. A sidewall for forming the via hole 41 includes a forward tapered shape whose cross section in the parallel direction to the substrate surface decreases as approaching the lower surface from the upper surface of the second interlayer insulating film 40, and a spacer film 42 made of an insulating material different from that of the second interlayer insulating film 40 is embedded in the sidewall from the upper end part of the via hole to the predetermined depth. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2010109183(A) 申请公布日期 2010.05.13
申请号 JP20080280181 申请日期 2008.10.30
申请人 TOSHIBA CORP 发明人 TAKENOUCHI YOSHIO
分类号 H01L21/768;H01L21/8247;H01L23/522;H01L27/115;H01L29/788;H01L29/792 主分类号 H01L21/768
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