发明名称 LOCK DETECTION CIRCUIT AND LOCK DETECTING METHOD
摘要 Provided are a lock detection circuit and a lock detecting method. The lock detection circuit includes two delay devices, four flip-flops and two logic gates, and can accurately detect a lock state of a phase locked loop (PLL) circuit. Therefore, the lock detection circuit can be implemented in a simple structure, and as a result, the lock detection circuit can be compact in size and can consume less electric power. Also, the lock detecting method enables lock detection process to be simpler, so that a lock state can be detected within a short time period.
申请公布号 US2010052752(A1) 申请公布日期 2010.03.04
申请号 US20090466283 申请日期 2009.05.14
申请人 ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 LEE HUI DONG;KIM KWI DONG;KWON JONG KEE
分类号 H03L7/06 主分类号 H03L7/06
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