| 摘要 |
Subject: method for the improvement of digital circuits by minimization of Boolean operations of multiple variables through hierarchical Karnaugh maps. Said method employs: the simple functions AM mod 4 and AM div 4 (where AM is the number of the variables of the logic function to be simplified) for the systemic calculation of the whole number of the ranks of the hierarchical map, and the calculation of the complexity of each rank; the systemic conventional minimization methods via Karnaugh maps for the simplification of digital circuits having infinite numbers of variable inputs; the result of the AM mod 4 for the determination of the number of variables of the highest in hierarchy map; the AM div 4 for finding the number of the remainingranks of the maps having 4 variables each. At each rank of the map the simplification is similarly accomplished as in conventional Karnaugh maps presented in the known groupings. |
