发明名称 JITTER APPLICATION CIRCUIT, PATTERN GENERATOR, TEST APPARATUS, AND ELECTRONIC DEVICE
摘要 PROBLEM TO BE SOLVED: To easily generate a jittery superimposed signal having a timing jitter of high frequency. SOLUTION: Provided is a jitter application circuit that generates a jittery superimposed signal including jitter, including a plurality of delay circuits that receive a supplied reference signal in parallel and delay the received reference signal by a preset delay amount and a signal generating section that generates each edge of the jittery superimposed signal according to a timing of the signal output by each delay circuit. Each delay circuit includes a delay setting section for setting the delay amount according to the jitter to be applied on each edge of the jitter superimposed signal. In the jitter application circuit, the delay amount of at least one delay circuit is set to be a value different from an integer multiple of an average period of the jitter superimposed signal. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009180732(A) 申请公布日期 2009.08.13
申请号 JP20090020430 申请日期 2009.01.30
申请人 ADVANTEST CORP 发明人 ICHIYAMA KIYOTAKA;ISHIDA MASAHIRO
分类号 G01R31/30;G01R29/02;H03K5/14;H03K5/156 主分类号 G01R31/30
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