| 摘要 |
PROBLEM TO BE SOLVED: To enable high-speed horizontal data transfer in a column AD type CMOS sensor. SOLUTION: An L-level VL is changed to a third voltage level VL1 between H and L, and H-level VH is maintained at H-level VH1 of the same voltage level. Voltage information (VL1-VH1), having narrow voltage amplitude biased to a power supply voltage Vdd side, is converted into voltage information VLout, VHout at a logic level for a latter circuit for output. Alternatively, the H-level VH is changed into a third voltage level VH2 between H and L, and the L-level VL is maintained at L-level VL2 of the same voltage level. Voltage information (VL2-VH2), having a narrow voltage amplitude biased to a grounding voltage GND side, is converted into voltage information VLout, VHout at a logic level for a latter circuit for output. The voltage information (VL1-VH1, VL2-VH2) may be shifted to voltage information (VL3-VH3), at an intermediate position between the voltage source Vdd and the grounding voltage GND, and then converted into the voltage information VLout, VHout. COPYRIGHT: (C)2009,JPO&INPIT
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