| 摘要 |
PROBLEM TO BE SOLVED: To achieve a test method by which defect of a memory core of a semiconductor memory such as an SRAM can be tested in a short time. SOLUTION: A test circuit 2 is connected to a memory core integrated unit 1 of SRAM. When the memory core integrated unit 1 is to be tested, a TEST start signal is set to high level. At the time, any one side of line out of a bit line BL or an inverted bit line BL_ of the memory core integrated unit 1 is used for writing data and data is set. The other bit line is used for reading data, the written data is inverted and set in the normal operation. It is decided that the memory core is normal by confirming that data set to the bit line BL and data set to the inverted bit line BL_ are inverted each other by EOR 22. COPYRIGHT: (C)2007,JPO&INPIT
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