| 摘要 |
A method for manufacturing a semiconductor device is provided to form a uniform ESD(Elevated Source Drain) junction region by performing a high-concentrated impurity ion implantation on an epi-silicon layer after a dielectric is formed at a facet part generated when the epi-silicon layer is grown. A gate(212) is formed on a semiconductor substrate(200). An LDD(Lightly Doped Drain) region(216) is formed at the semiconductor substrate at both sides of the gate. A spacer(214) is formed on both side walls of the gate. An epi-silicon layer(218) having a facet is grown on an upper end adjacent to the gate through an SEG(Selective Epitaxial Growth) process on the substrate of the gate. A dielectric is formed at the facet part of the epi-silicon layer. Impurities are ion-implanted into the epi-silicon layer to form an ESD junction region. When the dielectric is formed at the facet part of the epi-silicon layer, an HDP(High Density Plasma) oxide layer is formed on the semiconductor substrate to cover the gate and the epi-silicon layer. CMP(Chemical Mechanical Polishing) is performed on the HDP oxide layer to expose the gate. The HDP oxide layer is etched so that it remains partially on the epi-silicon layer including the facet part.
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