发明名称 |
PHASE SHIFTING IN DLL/PLL |
摘要 |
The disclosure relates to phase shifting in Delay Locked Loops (DLLs) and Phase-Locked Loops (PLLs). A charge pump in the DLL or PLL includes a capacitor connected in parallel to an output node. A primary current switching circuit charges the capacitor with a source current and discharges the capacitor with a sink current. A supplemental source circuit sources a positive phase shift producing current which has a range of magnitudes. A magnitude of the positive phase shift producing current is determined by at least one source selection signal. A supplemental sink circuit for sources a negative phase shift producing current which has a range of magnitudes. A magnitude of the negative phase shift producing current is determined by at least one sink selection signal.
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申请公布号 |
US2008238534(A1) |
申请公布日期 |
2008.10.02 |
申请号 |
US20070691849 |
申请日期 |
2007.03.27 |
申请人 |
MOSAID TECHNOLOGIES INCORPORATED |
发明人 |
MAI HUY TUONG;MILLAR BRUCE |
分类号 |
G05F1/10 |
主分类号 |
G05F1/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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