发明名称 |
OPTIMIZED CHARGE SHARING FOR DATA BUS SKEW APPLICATION |
摘要 |
PROBLEM TO BE SOLVED: To provide a charge sharing function during skewed data bus conditions in an integrated circuit memory. SOLUTION: The charge sharing circuits are coupled to each of capacitive lines in a charge sharing line set to provide a charge recycling function. An extra clock signal becomes active one cycle earlier during a first clock period to trigger an extra drive circuit to generate a voltage difference on a first capacitive line. An extra voltage signal on the first capacitive line takes place earlier than usual and allows for appropriate charge sharing between a second capacitive line and the first capacitive line. Also, an auxiliary control signal triggers a reference reading circuit to generate data and a voltage on the first capacitive lines similar to a voltage present among real data for the appropriate charge sharing. The auxiliary reading and driving circuit blocks are partial copies of the normal reading and driving circuits so that a matching voltage can be generated on an appropriate capacitive signal lines. COPYRIGHT: (C)2008,JPO&INPIT
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申请公布号 |
JP2008176904(A) |
申请公布日期 |
2008.07.31 |
申请号 |
JP20070248988 |
申请日期 |
2007.09.26 |
申请人 |
UNITED MEMORIES INC;SONY CORP |
发明人 |
PARRIS MICHAEL C;KIM C HARDEE |
分类号 |
G11C11/409;G11C11/4096 |
主分类号 |
G11C11/409 |
代理机构 |
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地址 |
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