发明名称 |
Apparatus and Method for Cache Maintenance |
摘要 |
A single unified level one instruction cache in which some lines may contain traces and other lines in the same congruence class may contain blocks of instructions consistent with conventional cache lines. Control is exercised over which lines are contained within the cache. This invention avoids inefficiencies in the cache by removing trace lines experiencing early exits from the cache, or trace lines that are short, by maintaining a few bits of information about the accuracy of the control flow in a trace cache line and using that information in addition to the LRU (Least Recently Used) bits that maintain the recency information of a cache line, in order to make a replacement decision.
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申请公布号 |
US2008114964(A1) |
申请公布日期 |
2008.05.15 |
申请号 |
US20060559512 |
申请日期 |
2006.11.14 |
申请人 |
DAVIS GORDON T;DOING RICHARD W;JABUSCH JOHN D;KRISHNA M V V ANIL;OLSSON BRETT;ROBINSON ERIC F;SATHAYE SUMEDH W;SUMMERS JEFFREY R |
发明人 |
DAVIS GORDON T.;DOING RICHARD W.;JABUSCH JOHN D.;KRISHNA M V V ANIL;OLSSON BRETT;ROBINSON ERIC F.;SATHAYE SUMEDH W.;SUMMERS JEFFREY R. |
分类号 |
G06F9/305 |
主分类号 |
G06F9/305 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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