发明名称 METAL WIRING STRUCTURE FOR A SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
摘要 <p>An interconnection structure of a semiconductor device is provided to prevent a barrier layer positioned between an insulation layer and a contact plug from being damaged in a planarization process for forming the contact plug and maintain sufficiently low contact resistance of the contact plug by forming a barrier layer in which the upper portion of the barrier layer is made of a metal nitride and the lower portion of the barrier layer is made of a metal layer and a metal nitride. An insulation layer(200) whose upper surface is planarized is formed on a semiconductor substrate(100), filling a space between a plurality of conductive structures. The insulation layer can be formed by a CVD process using as source gas Si(OC2H5)4 gas, oxygen gas or ozone gas. The insulation layer is partially removed to form an opening exposing a part of the substrate. A barrier layer is formed along the inner wall and bottom of the opening and the upper surface of the insulation layer, including a metal layer and a nitride layer under the opening and having a nitride layer on the opening. A conductive layer is formed on the resultant structure, filling the opening. The conductive layer and the barrier layer are partially removed to expose the upper surface of the insulation layer so that the conductive layer is left only in the opening covered with the barrier layer to form a metal plug.</p>
申请公布号 KR100806128(B1) 申请公布日期 2008.02.22
申请号 KR20060125310 申请日期 2006.12.11
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 PARK, JIN HO;CHEONG, SEONG HWEE;CHOI, GIL HEYUN;LEE, SANG WOO;LEE, HO KI
分类号 H01L21/28 主分类号 H01L21/28
代理机构 代理人
主权项
地址
您可能感兴趣的专利