发明名称 |
BIT LINE COUPLING |
摘要 |
The invention provides methods and apparatus. Alternate bit-line pairs of a memory device are concurrently selected. Each bit-line pair has one bit line formed at a first vertical level and one adjacent bit line formed at a second vertical level different than the first vertical level. |
申请公布号 |
WO2007120389(A3) |
申请公布日期 |
2008.02.14 |
申请号 |
WO2007US04476 |
申请日期 |
2007.02.22 |
申请人 |
MICRON TECHNOLOGY , INC.;ARITOME, SEIICHI |
发明人 |
ARITOME, SEIICHI |
分类号 |
G11C7/02;G11C7/18;H01L27/115 |
主分类号 |
G11C7/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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