CONTROLLER AND MEMORY SYSTEM

摘要

PROBLEM TO BE SOLVED: To provide a controller and a memory system capable of improving efficiency and reliability in debug.

SOLUTION: The controller includes a host interface 5a receiving an instruction to a memory system from the outside of the memory system; a processing circuit 6a processing the instruction, controlling an operation of a semiconductor memory 3a according to a processing result, and having a control memory; a debug data acquisition device 7a acquiring the data stored in the control memory when the control is performed as the data for debug; and an input/output control device 8a outputting the data for debug to the outside of the memory system via a host interface 5a during a period of time when input of data from the outside of the memory system to the host interface 5a is not performed.

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