发明名称 |
CONNECTION VERIFICATION TECHNIQUE |
摘要 |
<p>Embodiments of the present invention are generally directed to testing connections of a memory device to a circuit board or other device. In one embodiment, a memory device that is configured to facilitate continuity testing between the device and a printed circuit board or other device is disclosed. The memory device includes a substrate and two connection pads (58) that are electrically coupled to one another via a test path (66). A system and method for testing the connections between a memory device and a circuit board or other device are also disclosed.</p> |
申请公布号 |
WO2007079006(A3) |
申请公布日期 |
2007.09.13 |
申请号 |
WO2006US48891 |
申请日期 |
2006.12.21 |
申请人 |
MICRON TECHNOLOGY, INC.;KINSLEY, THOMAS |
发明人 |
KINSLEY, THOMAS |
分类号 |
G01R31/04 |
主分类号 |
G01R31/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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