发明名称 Encryption processing method and encryption processing device
摘要 An increase in safety from attacks by use of hardware-like methods by small-sized hardware is achieved. An encryption processing device includes a logical circuit capable of programmably setting logics for executing cipher processing, a memory that stores plural pieces of logical configuration information corresponding to an identical cipher processing algorithm, and a CPU that selectively sets plural logics corresponding to an identical cipher processing algorithm in the logical circuit. Even in processing using an identical cipher key, by changing the logic of the logical circuit for each processing, power consumption in cipher processing can be varied, and places a timing in which malfunctions occur can be varied. Moreover, an increase in the scale of hardware for realizing plural logics can be curbed.
申请公布号 US2007195949(A1) 申请公布日期 2007.08.23
申请号 US20070653879 申请日期 2007.01.17
申请人 OKOCHI TOSHIO;ENDO TAKASHI;WATANABE TAKASHI;KAMEYAMA TATSUYA;OTA SHUNSUKE 发明人 OKOCHI TOSHIO;ENDO TAKASHI;WATANABE TAKASHI;KAMEYAMA TATSUYA;OTA SHUNSUKE
分类号 H04L9/28 主分类号 H04L9/28
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