发明名称 Clock signal detector
摘要 A clock signal detector is provided. The device comprises a plurality of signal delayers and a plurality of flip-flops for comparing the offset range of the clock signal between two different groups, and transmitting the resulted signal to a phase compensator, which is used to send a regulating clock signal to a clock generator. Therefore, the offset ranges of the clock signals from two different groups will be within the range of the system requirement, such that it can optimize the system operation.
申请公布号 US2007152716(A1) 申请公布日期 2007.07.05
申请号 US20070648593 申请日期 2007.01.03
申请人 KUO HUNG Y;HSIEH JANQLIH;CHEN JENNY;CHOU HUEILIN 发明人 KUO HUNG Y.;HSIEH JANQLIH;CHEN JENNY;CHOU HUEILIN
分类号 H03D13/00 主分类号 H03D13/00
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