发明名称 METHOD FOR FORMING DUAL GATE OF SEMICONDUCTOR DEVICE
摘要 A method for forming a dual gate in a semiconductor device is provided to prevent diffusion of dopants between an N-type polysilicon layer and a P-type polysilicon layer by separately forming gates in NMOS and PMOS regions while using an oxide layer mask. A oxide layer pattern exposing a gate region is formed on a semiconductor substrate(100) in which an NMOS region and a PMOS region are defined. A gate oxide layer(130) of a predetermined thickness is formed on the front surface of the semiconductor substrate including the gate region. After a polysilicon layer is formed on the resultant structure, the polysilicon layer is planarized to expose the oxide layer. An N-type impurity ion implantation process is performed on the polysilicon layer in the PMOS region wherein boron ions are implanted by using a photoresist layer pattern as a mask after the photoresist layer pattern is formed on the NMOS region. A P-type impurity ion implantation process is performed on the polysilicon layer in the NMOS region. After a diffusion preventing layer is formed on the resultant structure, a heat treatment is performed. After the diffusion preventing layer is removed, a stack structure including a gate metal layer(170) and a gate hard mask layer(180) is formed. The stack structure, the polysilicon layer and the gate oxide layer are etched to form a gate.
申请公布号 KR20070071662(A) 申请公布日期 2007.07.04
申请号 KR20050135332 申请日期 2005.12.30
申请人 HYNIX SEMICONDUCTOR INC. 发明人 OH, TAE KYOUNG
分类号 H01L27/092 主分类号 H01L27/092
代理机构 代理人
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