| 摘要 |
A semiconductor integrated circuit that can be tested in a reduced test time includes a high-frequency receiving circuit for receiving a high-frequency signal, and a demodulation circuit for demodulating a signal received from the high-frequency receiving circuit. The demodulation circuit includes an SRAM, an SRAM control circuit, and a test data transmitting circuit. The SRAM control circuit receives, from a semiconductor test device, test data for driving and testing the high-frequency receiving circuit, and writes the test data into the SRAM. The test data transmitting circuit reads out from the SRAM test data for driving and testing the high-frequency receiving circuit, and transmits the test data to the high-frequency receiving circuit.
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