<p>A high speed transmission system includes at least one transmitter (10d), a buffer circuit (50) for assembling into a data packet in parallel a number of sample conversion words from said transmitter, a marker circuit for adding a marker word (48) to said data packet for framing said data packet, and a serializer (54) circuit for serializing said data packet either before or after said marker word is added, with an embedded clock for transmission.</p>
申请公布号
WO2007035260(A1)
申请公布日期
2007.03.29
申请号
WO2006US34716
申请日期
2006.09.06
申请人
ANALOG DEVICES, INC.;JARMAN, DAVID, C.;VASSALLI, LUCA