发明名称 Programmable logic device architecture for accommodating specialized circuitry
摘要 A programmable logic device (PLD) having one or more programmable logic regions and one or more conventional input/output regions additionally has one or more peripheral areas including specialized circuitry. The peripheral specialized regions, which are not connected to the remainder of the programmable logic device (and may be made on separate dies from the remainder of the programmable logic device mounted on a common substrate), and one or both of the programmable logic regions and the conventional I/O regions, have contacts for metallization traces or other interconnections to connect the peripheral specialized regions to the remainder of the programmable logic device. The same PLD can be sold with or without the specialized circuitry capability by providing or not providing the interconnections. The peripheral specialized regions may include high-speed I/O (basic, up to about 3 Gbps, and enhanced, up to about 10-12 Gbps), as well as other types of specialized circuitry.
申请公布号 US2007063733(A1) 申请公布日期 2007.03.22
申请号 US20050230002 申请日期 2005.09.19
申请人 ALTERA CORPORATION 发明人 SHUMARAYEV SERGEY Y.;PATEL RAKESH H.;LEE CHONG H.
分类号 H03K19/177 主分类号 H03K19/177
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