| 摘要 |
<p>A shift register circuit that improves yield, reduces cost, and embodies a pull-swing drive and low power consumption is disclosed. The shift register is a 4-phase shift register circuit comprising a plurality of PMOS transistors, and capacitors. The shift register circuit includes n (n is integer) register stages, and each register stage is connected to a start pulse input line or an output voltage line of a previous register stage, and is connected to three of four clock signal supply lines. Each of the n register stages comprises circuitry ensuring that the output stage of each register stage drives the output to either of first and second power supplies, but not both.</p> |
