Phase synchronous circuit

摘要

According to an aspect of the invention, there is provided a phase synchronous circuit generating an output signal synchronized with an input signal. The phase synchronous circuit comprises an output circuit putting out an output signal according to an input clock signal, a selection circuit selecting a clock signal applied to the output circuit from multiphase clock signals such that the output circuit puts out an output signal synchronized with the input signal. The internal delay in a phase synchronous circuit using a multiphase clock signal can be efficiently compensated and an output signal synchronized with the reference signal can be generated.