发明名称 Content addressable memory device
摘要 In accordance with the regions which are component elements of memory information (entry) and input information (comparison information or search key), quaternary information including a pair of the minimum value and the difference or ternary information including a pair of the data and the mask are used as I/O signals. In addition, in accordance with the two types of information, two types of encoding circuits and decoding circuits are disposed, and either one of the encoding circuits and the decoding circuits are activated in accordance with the values set to the registers disposed to designate the format of information in each region of the entry and the search key. By selecting the desired register from the plurality of registers in response to the external command signals and address signals, the encoding and decoding in accordance with the information to be processed are carried out.
申请公布号 US7173838(B2) 申请公布日期 2007.02.06
申请号 US20050072246 申请日期 2005.03.07
申请人 HITACHI, LTD. 发明人 HANZAWA SATORU;SEKIGUCHI TOMONORI;TAKEMURA RIICHIRO
分类号 G11C15/00;G11C15/04;H04L12/56 主分类号 G11C15/00
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