| 摘要 |
PROBLEM TO BE SOLVED: To make efficient the acceleration tests of transistors, included in inverter circuits of semiconductor integrated circuits. SOLUTION: This test apparatus is provided with a test circuit 20 for freely short-circuiting output terminals 30A and 30B of inverter circuits 11 and 12, which are constituted, in such a way as to include CMOS circuits, and inputting signals of exclusive logic values to the inverter circuits 11 and 12 of which the output terminals 30A and 30B are in a short-circuited state. By turning a switch 50 and to short-circuiting the output terminals 30A and 30B and alternately inputting signals of different levels to the inverter circuits 11 and 12 at test, a current is made to alternately flow through an NchMOS transistor and a PchMOS transistor included in the two CMOS circuits to activate them. COPYRIGHT: (C)2007,JPO&INPIT
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