<p>A signed multiplication method and a corresponding device for multiplying a first multiplicand with a second multiplicand. The device stores the first multiplicand in a first register as a first vector of at least one respective digit and storing the second multiplicand in a second register as a second vector of at least one respective digit, each digit having a pre-determined number of bits. The method further converts the digits of the first vector and the second vector to corresponding digits of one bit less each than the pre-determined number of bits. A processor effects signed multiplication of the multiplicands.</p>
申请公布号
WO2006120680(A2)
申请公布日期
2006.11.16
申请号
WO2006IL00551
申请日期
2006.05.09
申请人
M-SYSTEMS FLASH DISK PIONEERS LTD.;DROR, ITAI;DOLGUNOV, BORIS